1. Field of the Invention
The invention relates generally to semiconductor structures. More particularly, the invention relates to semiconductor structures with enhanced performance and reliability.
2. Description of the Related Art
Recent advances in semiconductor technology have included the use of semiconductor-on-insulator substrates when fabricating semiconductor devices. Semiconductor-on-insulator substrates are desirable insofar as semiconductor-on-insulator substrates provide for superior semiconductor device isolation, and also for uniformly thinner channel regions within semiconductor devices.
Although semiconductor-on-insulator substrates are thus often essential in semiconductor device fabrication to provide enhanced performance semiconductor devices, devices fabricated within semiconductor-on-insulator substrates are nonetheless not entirely without difficulties. In particular, due to the superior isolation capabilities of semiconductor-on-insulator substrates, semiconductor devices formed using semiconductor-on-insulator substrates experience what is generally described as a floating body effect. A floating body effect within a semiconductor device often causes for a threshold voltage shifting within the semiconductor device. Such a floating body effect also provides for soft errors within field effect devices such as metal oxide semiconductor field effect transistors fabricated using semiconductor-on-insulator substrates.
Various semiconductor structures having desirable properties are known in the semiconductor fabrication art.
For example, Beyer et al., in U.S. Pat. No. 5,962,895, teaches a metal oxide semiconductor field effect transistor efficiently fabricated within a semiconductor-on-insulator substrate, and including a body contact. To realize the foregoing result, the body contact within the metal oxide semiconductor field effect transistor is fabricated using a self-aligned method.
In addition, Smith III, in U.S. Pat. No. 6,387,739, also teaches a metal oxide semiconductor field effect transistor including a body contact. The body contact within this metal oxide semiconductor field effect transistor is fabricated absent overlay tolerance. To realize the foregoing result, the invention uses the dimension of an active area for determining a transistor width on one side, but by contrast the dimension of a gate conductor for determining the transistor width on another side, when a source and drain are connected together within the transistor.
Finally, Min et al., in U.S. Pat. No. 6,724,048, also teaches a field effect transistor that includes a body contact, and is otherwise fabricated with improved electrical properties. The inventive field effect transistor realizes the foregoing result by using a gate dielectric layer that includes variable thicknesses.
Semiconductor device and structure dimensions are certain to continue to decrease, and as a result thereof desirable are semiconductor devices, such as metal oxide semiconductor field effect transistor devices, that may be fabricated with enhanced performance while using semiconductor-on-insulator substrates.